| Balanced Current Source Model of the Three-input Combinational Logic Gate for Timing Analysis | |
|---|---|
| Author | Kai Chen and Young Hwan Kim |
| Journal | 11th Conference on PhD Research in Microelectronics and Electronics (IEEE PRIME 2015), Glasglow, UK |
| Impact factor | |
| Year | Jun. 29, 2015~Jul. 2, 2015 |
| Category | |
| Link |
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=72513…
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