Conference
CAD & SoC Design Laboratory

Conference

Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study
Author Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang
Journal IEEE/ACM Design, Automation and Test in Europe Conference and Exhibition (DATE)
Impact factor
Year 2018
Category
File 첨부 Fast_chip-package-PCB_coanalysis_methodology_for_power_integrity_of_multi-domain_high-speed_memory_A_case_study.pdf (323.7K) 1회 다운로드 DATE : 2025-08-01 00:13:57
Link 관련링크 https://ieeexplore.ieee.org/document/8342132 113회 연결

Our submission to DATE 2018, "Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study" authored by Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang has been accepted.