Laboratory news
CAD & SoC Design Laboratory
Total 73건 2 페이지
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번호 컨텐츠
58
Our submission to DAC 2024, "HiLight: A Comprehensive Framework for High-Performance and Lightweight Scalability in Surface Code Communication", authored by Sunghye Park has been accepted.
2024-02-27   1025
57
Our submission to DAC 2024, "PPA-Relevant Clustering-Driven Placement for Large-Scale VLSI Designs", authored by Seonghyeon Park and Kyungjun Min has been accepted.
2024-02-27   1036
56
Our submission to DAC 2024, "SkyPlace: A New Mixed-size Placement Framework using Modularity-based Clustering and SDP Relaxation", authored by Jaekyung Im has been accepted.
2024-02-27   1087
55
Our submission to DAC 2024, "RL-PTQ: RL-based Mixed Precision Quantization for Hybrid Vision Transformers", authored by Eunji Kwon has been accepted.
2024-02-27   1022
54
Congratulations, Seonghyeon Park won the 3rd POSTECH-EE Excellence Research Performance Competition Excellence Award.
2024-01-22   975
53
Congratulations, Sunghye Park has been selected as a scholarship student for The Institute of Semiconductor Engineers.
2024-01-22   955
52
Our submission to TCAS I 2024, "MA-Opt: Reinforcement Learning-based Analog Circuit Optimization using Multi-Actors", authored by Youngchang Choi has been accepted.
2024-01-17   1047
51
Our submission to ISQED 2024, "QNSA: Quantum Neural Simulated Annealing for Combinatorial Optimization", authored by Seongbin Kwon has been accepted.
2024-01-17   963
50
Congratulations to Minjae Kim, Seojeong Kim, Seung Ju Lee and Seongbin Kwon on passing their MS defense.
2024-01-03   943
49
Our submission to DATE 2024, "Unveiling the Black-Box: Leveraging Explainable AI for Optimizing FPGA Design Space", authored by Jaemin Seo has been accepted.
2023-11-10   1107
48
Our submission to DATE 2024, "CTRL-B: Back-End-Of-Line Configuration Pathfinding using Cross-Technology Transferable Reinforcement Learning", authored by Sung-Yun Lee has been accepted.
2023-11-10   1181
47
Our submission to DATE 2024, "ViT-ToGo : Vision Transformer Accelerator with Grouped Token Pruning", authored by Seungju Lee has been accepted.
2023-11-10   1148
46
Our submission to DATE 2024, "Improvement of Mixed Track-Height Standard-Cell Placement", authored by Minhyuk Kweon has been accepted.
2023-11-10   1030
45
Our submission to MLCAD 2023, "Machine Learning-based Fast Circuit Simulation for Analog Circuit Array", authored by Jaeseung Lee has been accepted.
2023-08-21   1244
44
Our submission to ICCAD 2023, "Routability Prediction and Optimization Using Explainable AI", authored by Seonghyeon Park has been accepted.
2023-07-24   1449
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