Conference
CAD & SoC Design Laboratory

Conference

FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks
Author Haena Song, Jongho Yoon, Dohun Kim, Eunji Kwon, Tae-Hyun Oh, and Seokhyeong Kang
Journal Design, Automation and Test in Europe Conference and Exhibition (DATE)
Impact factor
Year 2023
Category
File 첨부 2023_DATE_HNS_Paper.pdf (2.3M) 2회 다운로드 DATE : 2025-07-31 21:46:51
Link 관련링크 https://ieeexplore.ieee.org/document/10137111 163회 연결
Our submission to DATE 2023, "FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks" authored by Haena Song, Jongho Yoon, Dohun Kim, Eunji Kwon, Tae-Hyun Oh, and Seokhyeong Kang has been accepted.