Current member
CAD & SoC Design Laboratory

Current member

Jaekyung Im

Postdoctoral Researcher at EE, POSTECH from 2026

  •   Tel : +82-54-279-5587
  •   Location : Science Building II 308, 77 Cheongam-Ro. Nam-Gu. Pohang. Gyeongbuk. Korea 37673
  •   Email : jkim97@postech.ac.kr

Education

  • MS-Ph.D. from EE, POSTECH, Pohang (Mar. 2021 - Feb. 2026)
  • BS. from EE, Hanyang University, Seoul (Mar. 2017 - Feb. 2021)

Research Area

  • Physical Design, Numerical Optimization

Conference Paper

  • Jaekyung Im, and Seokheong Kang, "TANGRAM: A Novel On-Track Bus Routing via Placement and Compression of Polygons", IEEE/ACM Design, Automation and Test in Europe Conference & Exhibition (DATE), 2026
  • Jaekyung Im, and Seokheong Kang, "A Parallel Analytical Legalization Algorithm via Alternating Direction Method of Multipliers", in ACM/IEEE International Conference on CAD (ICCAD), 2025
  • Jaekyung Im, and Seokheong Kang, "SkyPlace: A NewMixed‑size Placement Framework using Modularity‑based Clustering and SDP Relaxation", in ACM/IEEE Design Automation Conference (DAC), 2024
  • Jaekyung Im, and Seokheong Kang, "Graph Partitioning Approach for Fast Quantum Circuit Simulation", in ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), 2023
  • Jaekyung Im, and Seokheong Kang, "Comparative Analysis between Verilog and Chisel in RISC‑V Core Design and Verification", in IEEE International SoC Design Conference (ISOCC), 2021
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