Laboratory news
CAD & SoC Design Laboratory

Laboratory news

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103
Our submission to DAC 2026, "GTX: Graph Transformer for Parasitic EXtraction on Analog Circuits", authored by Youngchang Choi, Myungjun Kook, and Seokhyeong Kang has been accepted.
2026-02-26   100
102
Our submission to DAC 2026, "Differentiable Fill Insertion with Explicit Delay Optimization", authored by Jinoh Cho, Jinmo Ahn, Jakang Lee, Jaeseung Lee, Seonghyeon Park and Seokhyeong Kang has been a…
2026-02-26   93
101
Congratulations to Jinoh Cho, and Jinmo Ahn for receiving "장려상" from the 32nd Samsung Electronics Human Tech Paper Award
2026-02-12   109
100
Congratulations to Jaekyung Im for receiving "3rd Award" from the 5th POSTECH-EE Research Achievement Sharing and Award Ceremony
2026-02-03   126
99
Congratulations to Joonseok Kim, Jonghyeon Nam, Daeheon Lee, and Donghwan Yoon for receiving '장려상' from the 2nd AI Chip Con
2025-12-23   191
98
Our submission to DATE 2026, " Efficient Down-sampling in Hybrid Neural Networks using Adversarial Autoencoders", authored by Jonghyeon Nam, Joonseok Kim, Eunji Kwon, and Seokhyeong Kang has been acce…
2025-11-06   281
97
Our submission to DATE 2026, "TANGRAM: A Novel On-Track Bus Routing via Placement and Compression of Polygons", authored by Jaekyung Im and Seokhyeong Kang has been accepted.
2025-11-06   240
96
Congratulations to Prof. Seokhyeong Kang has been appointed as '무은재 석좌교수'.
2025-10-26   345
95
Prof. Kang presented the talk, "AI-driven Electronic Design Automation: From Predictive Models to Agentic AI", at Samsung AI Forum 2025.
2025-09-28   440
94
Our submission to TCAD, "CTRL-B: Back-End-Of-Line Configuration Optimization using Cross-Domain Transferable Reinforcement Learning" authored by Jaeseung Lee has been accepted.
2025-09-24   486
93
POSTECH CSDL won 2nd Place at MLCAD 2025 Contest
2025-09-19   689
92
Our submission to ASP-DAC 2026, " Au-MEDAL: Adaptable Grid Router with Metal Edge Detection And Layer Integration", authored by Andrew B. Kahng, Seokhyeong Kang, Sehyeon Kim, Jakang Lee and Dooseok Yo…
2025-09-02   621
91
Our submission to ASP-DAC 2026, " REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Models", authored by Kyungjun Min*, Kyumin Cho* has been accepted.
2025-09-01   601
90
Our submission to ASP-DAC 2026, "A Heterogeneous Graph-based Gate Sizer Integrating Graph Attention Network and Transformer", authored by Jinmo Ahn has been accepted.
2025-09-01   643
89
Our submission to ICCAD 2025, "Enhancing Timing Closure via Spatially Embedded Graph Transformer with Low Power/Area Overhead", authored by Joonyoung Seo has been accepted.
2025-08-10   741
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