| An Accurate Delay Modeling Techniques for Switch-Level Timing Verification | |
|---|---|
| Author | S. Hwang, Y.H. Kim, and R. Newton |
| Journal | Proc. of Design Automation Conference, ACM/IEEE |
| Impact factor | pp. 227-233 |
| Year | Jun. 1986 |
| Category | |
| Link |
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1586093
303회 연결
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