Conference
CAD & SoC Design Laboratory

Conference

Total 190건 6 페이지
2017
115 Fast Predictive Useful Skew Methodology for Timing-Driven Placement Optimization Seungwon Kim, SangGi Do and Seokhyeong Kang Proc. ACM/IEEE Design Automation Conference , 2017 , pp. 18-2
114 A Novel Ternary Multiplier based on Ternary CMOS Compact Model Yesung Kang, Jaewoo Kim, Sunmean Kim, Sunhae Shin, E-San Jang, Jae Won Jeong, Kyung Rok Kim and Seokhyeong Kang Proc. IEEE International Symposium on Multiple-Valued Logic , 2017 , pp 25-30
2016
113 Block-based static caption detection using intensity range Sangho Yoon, Suk-Ju Kang and Young Hwan Kim Consumer Electronics, 2016 IEEE 5th Global Conference on, Kyoto, Japan , Oct. 11, 2016~Oct. 14, 2016 , pp. 1-2
112 A Novel Approximate Synthesis Flow for the Energy-Efficient FIR filter Yesung Kang, Jaewoo Kim and Seokhyeong Kang Proc. IEEE International Conference on Computer Design , 2016 , pp. 96-102
111 A Novel Design Methodology for Error-resilient Circuits in Near-threshold Computing Jaemin Lee, Sunmean Kim, Youngmin Kim and Seokhyeong Kang Proc. IEEE International Conference on Consumer Electronics-Asia , 2016 , pp. 1-4
2015
110 Balanced Current Source Model of the Three-input Combinational Logic Gate for Timing Analysis Kai Chen and Young Hwan Kim 11th Conference on PhD Research in Microelectronics and Electronics (IEEE PRIME 2015), Glasglow, UK , Jun. 29, 2015~Jul. 2, 2015
109 Image Segmentation using Linked Mean-Shift Vectors with Region Attribution Analysis Hanjoo Cho and Young Hwan Kim 11th Conference on PhD Research in Microelectronics and Electronics (IEEE PRIME 2015), Glasglow, UK , Jun. 29, 2015~Jul. 2, 2015 , pp. 188-191
108 Foreground-based Depth Map Generation for 2D-to-3D Conversion Ho Sub Lee, Sung In Cho, Gyu Jin Bae, Hi-Seok Kim, and Young Hwan Kim International Symposium on Circuits and Systems (ISCAS 2015), Lisbon, Portugal , May. 24, 2015~May. 27, 2015 , pp. 1210-1213
107 Current Source Model of Combinational Logic Gates for Accurate Gate-level Circuit Analysis and Timing Analysis Kai Chen, Young Hwan Kim VLSI Design, Automation and Test (VLSI-DAT 2015), Hsinchu, Taiwan , Apr. 27, 2015~Apr. 29, 2015
106 Automatic Depth Map Generation from a Single Image Using Segment-Adaptive Depth Merging Sung In Cho, Kyoungrok Cho, and Young Hwan Kim International Conference on Consumer Electronics, Las Vegas, USA , Jan. 9, 2015~Jan. 12, 2015 , pp. 668-669
105 An Optimal Operating Point By Using Error Monitoring Circuits with An Error-Resilient Technique Jaemin Lee, Seungwon Kim, Youngmin Kim and Seokhyeong Kang Proc. IFIP/IEEE International Conference on Very Large Scale Integration , 2015 , pp.69-73
104 Novel Adaptive Power Gating Strategy of TSV-based Multi-layer 3D IC Seungwon Kim, Ki Jin Han, Seokhyeong Kang and Yougming Kim Proc. IEEE International Symposium on Quality Electronic Design , 2015 , pp. 537-541
2014
103 Ray-casting algorithm and its considerations for parallel processing optimization techniques for parallel ray-casting algorithm Hanjoo Cho, Young Hwan Kim Integrated Circuits (ISIC), 2014 14th International Symposium on, Singapore, Singapore , Dec. 10, 2014~Dec. 12, 2014 , pp. 107 - 110
102 Image Denoising Considering Characteristics of YCbCr color channels Gyujin Bae, Sung In Cho, Sanghun Kim, and Young Hwan Kim International Conference on Consumer Electronics-Berlin (ICCE-berlin 2014), Berlin, Germany , Sep. 7, 2014~Sep. 10, 2014 , pp. 181-184
101 Stereo Confidence Metrics Using the Costs of Surrounding Pixels Sanghun Kim, Dong-Gon Yoo, and Young Hwan Kim International Conference on Digital Signal Processing, Hong Kong, China , Aug. 20, 2014~Aug. 23, 2014 , pp. 98-103
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