Conference
CAD & SoC Design Laboratory

Conference

Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study
Author Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang
Journal IEEE/ACM Design, Automation and Test in Europe Conference and Exhibition (DATE)
Impact factor
Year 2018
Category
File 첨부 DATE2018_PPT_SWK_v3.pdf (1.4M) 0회 다운로드 DATE : 2026-08-02 19:12:14
Link 관련링크 https://ieeexplore.ieee.org/document/8342132 442회 연결

Our submission to DATE 2018, "Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study" authored by Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang has been accepted.