Low Cost and Flexible Processor-Based Controller for Timing Signal Generation in PDP > Conference | 포항공대 CSDL

Conference

CAD & SoC Design Laboratory

PUBLICATIONS
- INTRODUCTION
- RESEARCH
- ADVISOR
- MEMBERS
- PUBLICATIONS
- CLASS
- NEWS
- PHOTOS
- LINKS
Conference

Conference

Low Cost and Flexible Processor-Based Controller for Timing Signal Generation in PDP
Author	J. W. Lee, M. J. Park, and Y. H. Kim
Journal	The 13th IEEE International Symposium on Consumer Electronics (ISCE 2009), Kyoto, Japan
Impact factor	pp. 692-695
Year	May. 25~28, 2009
Category
Link	http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5157030 347회 연결
.

검색

목록

이전글Design and Implementation of Median Filter based Adaptive Motion Vector Smoothing for Motion Compensated Frame Rate Up-Conversion 18.12.27
다음글Incremental Statistical Static Timing Analysis with Gate Timing Yield Emphasis 18.12.27