| Efficient Reduction Technique of Resistive Mesh Structured Power Network | |
|---|---|
| Author | J. -W. Kim, Y. H. Kim |
| Journal | Asia Symposium on Quality Electronic Design(Asqed) 2010, Penang, Malaysia |
| Impact factor | pp. 351-355 |
| Year | Aug. 3~4, 2010 |
| Category | |
| Link |
http://ieeexplore.ieee.org/search/srchabstract.jsp?tp=&arnumb…
263회 연결
|
. |
|
Conference
CAD & SoC Design Laboratory
Conference
CAD & SoC Design Laboratory
Science Building II (308, 402), 77 Cheongam-Ro. Nam-Gu. Pohang. Gyeongbuk. Korea 37673TEL : +82-54-279-5587 l E-mail : shkang@postech.ac.kr
개인정보취급처리방침 COPYRIGHT ⓒ2018 CSDL. ALL RIGHT RESERVED.