포항공대 CSDL

FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks
Author	Haena Song, Jongho Yoon, Dohun Kim, Eunji Kwon, Tae-Hyun Oh, and Seokhyeong Kang
Journal	Design, Automation and Test in Europe Conference and Exhibition (DATE)
Impact factor
Year	2023
Category
File	DATE23_RPBCM_CAM_v5.pdf (2.3M) 0회 다운로드 DATE : 2026-07-25 15:39:31
File	DATE23-RPBCM_presentation.pdf (6.6M) 0회 다운로드 DATE : 2026-07-25 15:39:31
Link	https://ieeexplore.ieee.org/document/10137111 451회 연결
Our submission to DATE 2023, "FPGA-Based Accelerator for Rank-Enhanced and Highly-Pruned Block-Circulant Neural Networks" authored by Haena Song, Jongho Yoon, Dohun Kim, Eunji Kwon, Tae-Hyun Oh, and Seokhyeong Kang has been accepted.

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