Conference
CAD & SoC Design Laboratory

Conference

Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study
Author Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang
Journal IEEE/ACM Design, Automation and Test in Europe Conference and Exhibition (DATE)
Impact factor
Year 2018
Category
Link 관련링크 https://ieeexplore.ieee.org/document/8342132 393회 연결

Our submission to DATE 2018, "Fast Chip-Package-PCB Coanalysis Methodology for Power Integrity of Multi-domain High-Speed Memory: A Case Study" authored by Seungwon Kim, Ki Jin Han, Youngmin Kim, and Seokhyeong Kang has been accepted.