DEMI: A Delay Minimization Algorithm for Cell-Based Digital VLSI Design > Journal | 포항공대 CSDL

Journal

CAD & SoC Design Laboratory

PUBLICATIONS
- INTRODUCTION
- RESEARCH
- ADVISOR
- MEMBERS
- PUBLICATIONS
- CLASS
- NEWS
- PHOTOS
- LINKS
Journal

Journal

DEMI: A Delay Minimization Algorithm for Cell-Based Digital VLSI Design
Author	Tae Hoon Kim and Y.H. Kim
Journal	IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Impact factor	Vol. E82-A, No. 3, pp. 504-511
Year	Mar. 1999
Category
Link	http://search.ieice.org/bin/summary.php?id=e82-a_3_504&catego… 155회 연결
.

목록

이전글ARDOR: An Area Optimization Algorithm for Cell Selection Problems 18.12.27
다음글Image Vector Quantization Using a Two-stage Self-Organizing Feature Map 18.12.27