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CAD & SoC Design Laboratory

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2024

2

Junctionless Negative-Differential-Resistance Device using 2D Van-Der-Waals Layered Materials for Ternary Parallel Computing Taeran Lee, Kil-Su Jung, Seunghwan Seo, Junseo Lee, Jihye Park, Sumin Kang, Jeongwon Park, Juncheol Kang, Hogeun Ahn, Suhyun Kim, Hae Won Lee, Doyoon Lee, Ki Seok Kim, Hyunseok Kim, Keun Heo, Sunmean Kim, Sang-Hoon Bae, Seokhyeong Kang, Kibum Kang, Jeehwa Advanced Materials , 2024

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1

MA-Opt: Reinforcement Learning-based Analog Circuit Optimization using Multi-Actor Youngchang Choi, Sejin Park, Minjeong Choi, Kyongsu Lee, and Seokhyeong Kang IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) , 2024

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