POSTECH CSDL won 2nd Place at MLCAD 2025 Contest
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작성자 최고관리자 댓글 0건 조회 680회 작성일 25-09-19 20:33본문
The CAD & SoC Design Laboratory (CSDL) of POSTECH, led by Prof. Seokhyeong Kang, placed second overall in the MLCAD 2025 Contest (homepage),— ReSynthAI: Physical-Aware Logic Resynthesis for Timing Optimization Using AI, co-organized by Arizona State University (ASU) and NVIDIA.
The contest was held as part of the 7th ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD 2025), which took place in Santa Cruz, California, USA.
A Global Competition
This year’s contest attracted 27 research teams from leading universities and companies worldwide, including IMEC, NXP, Samsung, UT Austin, Texas A&M, UC Davis, CUHK, and Fudan University. POSTECH CSDL competed as Team 13 (CSDL) among participants from top institutions.
Contest Theme & Tasks
The 2025 challenge, ReSynthAI: Physical-Aware Logic Resynthesis for Timing Optimization, focused on physical-aware logic resynthesis for timing optimization after global routing. Teams were asked to apply AI methods—supervised, unsupervised, and reinforcement learning—to perform netlist-level optimizations such as gate sizing, buffer insertion, Vt swaps, gate cloning, and logic restructuring, all while ensuring routability and minimizing congestion. (Github)
Final Results
1st Place: Fudan University (764 points)
2nd Place: POSTECH (713 points)
3rd Place: NXP (482 points)
POSTECH CSDL excelled by ranking first in 5 out of the 12 benchmarks, demonstrating competitiveness nearly equal to Fudan University. Despite a narrow point margin in the final tally, the team secured an outstanding second place overall.
Significance
This performance highlights POSTECH CSDL’s world-class expertise in AI-driven semiconductor design automation. By showcasing innovative approaches to physical-aware optimization, the lab has reaffirmed its role as a leader in bridging AI and EDA. Looking ahead, CSDL will continue to pursue research that advances both academic excellence and industrial innovation at the forefront of AI and semiconductor design.
- 이전글Our submission to TCAD, "CTRL-B: Back-End-Of-Line Configuration Optimization using Cross-Domain Transferable Reinforcement Learning" authored by Jaeseung Lee has been accepted. 25.09.24
- 다음글Our submission to ASP-DAC 2026, " Au-MEDAL: Adaptable Grid Router with Metal Edge Detection And Layer Integration", authored by Andrew B. Kahng, Seokhyeong Kang, Sehyeon Kim, Jakang Lee and Dooseok Yoon has been accepted. 25.09.02
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