Laboratory news
CAD & SoC Design Laboratory

Laboratory news

Total 120건 3 페이지
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번호 컨텐츠
90
Our submission to ASP-DAC 2026, "A Heterogeneous Graph-based Gate Sizer Integrating Graph Attention Network and Transformer", authored by Jinmo Ahn has been accepted.
2025-09-01   1223
89
Our submission to ICCAD 2025, "Enhancing Timing Closure via Spatially Embedded Graph Transformer with Low Power/Area Overhead", authored by Joonyoung Seo has been accepted.
2025-08-10   1314
88
Our submission to ICCAD 2025, "A Parallel Analytical Legalization Algorithm via Alternating Direction Method of Multipliers", authored by Jaekyung Im has been accepted.
2025-08-10   1298
87
Our submission to ICCAD 2025, "SO3-Cell: Standard Cell Layout Synthesis Framework for Simultaneous Optimization of Topology, Placement, and Routing", authored by Jakang Lee has been accepted.
2025-08-10   1358
86
Our submission to DAC 2025, "Late Breaking Results: A Geometric Diffusion Model for Macro Placement Generation", authored by Jongho Yoon has been accepted.
2025-03-25   1205
85
Our submission to DAC 2025, "Late Breaking Results: Fine-Tuning LLMs for Test Stimuli Generation", authored by Hyeonwoo Park has been accepted.
2025-03-25   1147
84
Our submission to DAC 2025, "FedEDA: Federated Learning Framework for Privacy-Preserving Machine Learning in EDA", authored by Joonseok Kim and Donggyu Kim has been accepted.
2025-02-01   1187
83
Congratulations to Prof. Seokhyeong Kang has received '해동반도체공학상 학술상' from the Institute of Semiconductor Engineers
2024-12-12   1171
82
Congratulations to Jinoh Cho for receiving "3rd Award" from the 4th POSTECH-EE Research Achievement Sharing and Award Ceremony
2024-12-01   1108
81
Congratulations to Jaemin Seo for receiving "2nd Award" from the 4th POSTECH-EE Research Achievement Sharing and Award Ceremony
2024-12-01   1096
80
Our submission to DATE 2025, "Improving LLM-based Verilog Code Generation with Data Augmentation and RL", authored by Kyunjun Min and Seonghyeon Park has been accepted.
2024-11-01   1163
79
Our submission to DATE 2025, "Neural Circuit Parameter Prediction for Efficient Quantum Data Loading", authored by Dohun Kim has been accepted.
2024-11-01   1050
78
Congratulations to Jaekyung Im for being selected to the Google Silicon Research Program
2024-10-01   1107
77
Congratulations to Jaemin Seo, Sejin Park, and Junyeong Seo for receiving "Synopsys Award" from ISOCC 2024
2024-09-17   1097
76
Congratulations to Kyungjun Min, Seonghyeon Park, and Hyeonwoo Park for receiving "Best Poster Award" from ISOCC 2024
2024-09-01   1109
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