Laboratory news
CAD & SoC Design Laboratory

Laboratory news

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Laboratory news 목록
번호 컨텐츠
44
Our submission to DATE 2023, "MA-Opt: Reinforcement Learning-based Analog Circuit Optimization using Multi-Actors", authored by Youngchang Choi has been accepted.
2022-11-01   678
43
Our submission to DATE 2023, "RL-Legalizer: Reinforcement Learning-based Cell Priority Optimization in Mixed-Height Standard Cell Legalization", authored by Sung-Yun Lee has been accepted.
2022-11-01   749
42
Our submission to DATE 2023, "Routability Prediction using Deep Hierarchical Classification and Regression", authored by Daeyeon Kim has been accepted.
2022-11-01   686
41
Our submission to ASP-DAC 2023, "Graph Partitioning Approach for Fast Quantum Circuit Simulation", authored by Jaekyung Im has been accepted.
2022-09-21   692
40
Our submission to ACCV 2022, "Adaptive FSP: Adaptive Architecture Search with Filter Shape Pruning", authored by Aeri Kim has been accepted.
2022-07-31   657
39
Our submission to ICCD 2022, "CPR: Crossbar-grain Pruning for RRAM-based Accelerator with Coordinate-based Weight Mapping", authored by Jihye Park has been accepted.
2022-07-26   630
38
Our submission to GLSVLSI 2022, "GAN-Dummy Fill: Timing-aware Dummy Fill Method using GAN", authored by Myong Kong has been accepted.
2022-07-24   617
37
Our submission to ICCAD 2022, "MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device", authored by Sunghye Park has been accepted.
2022-07-01   651
36
Congratulations to Jaemin Seo for receiving "Honorable Mention" from ISPD 2022
2022-05-04   712
35
Our submission to DAC 2022, "A Fast and Scalable Qubit-Mapping Method for Noisy Intermediate-Scale Quantum Computers", authored by Sunghye Park has been accepted.
2022-02-23   671
34
Our submission to DATE 2022, "Design and Evaluation Frameworks for Advanced RISC-based Ternary Processor", authored by Jongho Yoon and Sunmean Kim has been accepted.
2021-11-01   708
33
Congratulations to Chanhee Lee for receiving "Best Poster Award" from ISOCC 2021
2021-10-16   637
32
Our submission to ASP-DAC 2022, "Signal-Integrity-Aware Interposer Bus Routing in 2.5D Heterogeneous Integration", authored by Sung-Yun Lee has been accepted.
2021-09-20   670
31
One of our patents has been transferred to Samsung Electronics Co., Ltd. for 350 million KRW.
2021-07-25   665
30
Our submission to VLSI 2021, "A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers", authored by Seokhyeong Kang has been accep…
2021-07-23   591
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